Titlebook: Evaluation of State-of-the-Art Hardware Architectures for Fast Cone-Beam CT Reconstruction; Holger Scherl Book 2011 Vieweg+Teubner Verlag

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https://doi.org/10.1007/978-3-322-95977-5. Nowadays, only diminished gains in performance can be reached by higher processor clock rates. This results from the difficulty to find enough parallelism in the instruction stream of a single process to keep higher performance processor cores busy. Another cause is the increasing gap between proc

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micronized

as well. Several computer manufacturers offer FPGA-based accelerator components together with dedicated libraries in order to speed up the execution of numerically intensive codes. Such hardware components are particularly appropriate for applications in the signal processing domain such as image o

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弯弯曲曲

as well. Several computer manufacturers offer FPGA-based accelerator components together with dedicated libraries in order to speed up the execution of numerically intensive codes. Such hardware components are particularly appropriate for applications in the signal processing domain such as image or video compression, for instance.

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978-3-8348-1743-3Vieweg+Teubner Verlag | Springer Fachmedien Wiesbaden GmbH, Wiesbaden 2011

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Evaluation of State-of-the-Art Hardware Architectures for Fast Cone-Beam CT Reconstruction978-3-8348-8259-2Series ISSN 2625-9354 Series E-ISSN 2625-9362