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Titlebook: Embedded Systems: Design, Analysis and Verification; 4th IFIP TC 10 Inter Gunar Schirner,Marcelo Götz,Franz J. Rammig Conference proceeding

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Improving Education in Desegregated Schools,out decompression, notably for identifying repeated cycles or comparing different cycles. The evaluation demonstrates that our approach reaches high compression ratios on microcontroller execution traces.
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Programming Robots with Eventsa mechanism to handle various kinds of changes happening in the environment. Event handlers run in parallel either synchronously or asynchronously, and events can be reconfigured at runtime to modify their behavior when needed. We apply INI to the humanoid robot called Nao, for which we develop an o
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Joint Algorithm Developing and System-Level Design: Case Study on Video Encodinga specification capturing core algorithms. Algorithm development itself largely occurs in Algorithm Design Environments (ADE) with little or no hardware concern. Currently, algorithm and system design environments are disjoint; system level specifications are manually implemented which leads to the
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Automatic Execution of Test Cases on UML Models of Embedded Systemsthe engineers have to identify and fix the introduced errors as soon as possible. Therefore, it makes sense to facilitate the errors detection during the whole the design cycle, including the initial specification stages. This work proposed a test-based approach to aid the early verification of embe
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Compiler Optimizations Do Impact the Reliability of Control-Flow Radiation Hardened Embedded Softwarue to enable the software itself to detect and correct radiation induced soft-errors occurring in branches. Supported by a comprehensive fault injection campaign using an established benchmark suite in the embedded systems domain, we show that the careful selection of the available compiler optimiza
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Power Reduction in Embedded Systems Using a Design Methodology Based on Synchronous Finite State Macs. The proposed Model-Based-Development process uses Synchronous Finite State Machines (SFSM) to model the behavior of low-power devices. This methodology is aimed at devices at the lower-end of the complexity spectrum, as long as the device behavior can be modeled as SFSM. The implementation requir
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