Titlebook: Embedded Systems Design with FPGAs; Peter Athanas,Dionisios Pnevmatikatos,Nicolas Skla Book 2013 Springer Science+Business Media, LLC 2013

MIFF

书目名称Embedded Systems Design with FPGAs影响因子(影响力)




书目名称Embedded Systems Design with FPGAs影响因子(影响力)学科排名




书目名称Embedded Systems Design with FPGAs网络公开度




书目名称Embedded Systems Design with FPGAs网络公开度学科排名




书目名称Embedded Systems Design with FPGAs被引频次




书目名称Embedded Systems Design with FPGAs被引频次学科排名




书目名称Embedded Systems Design with FPGAs年度引用




书目名称Embedded Systems Design with FPGAs年度引用学科排名




书目名称Embedded Systems Design with FPGAs读者反馈




书目名称Embedded Systems Design with FPGAs读者反馈学科排名

Ventricle

中止

Book 2013ions.  Coverage includes state-of-the-art research from academia and industry on a wide range of topics, including applications, advanced electronic design automation (EDA), novel system architectures, embedded processors, arithmetic, and dynamic reconfiguration.

波动

https://doi.org/10.1007/978-1-4614-1362-2Analog Circuits; Digital Circuits; Embedded Systems; FPGA; Fault Tolerance; Field Programmable Gate Array

描绘

978-1-4899-9262-8Springer Science+Business Media, LLC 2013

转向

转向

Mikrobasierte Verfahren der Datenanalyse,e downscaling at nanoscale. State-of-the-art FPGA chips, which use most recent CMOS technologies and smallest feature sizes to meet high-performance demands, are at the front line to face this problem. In this chapter, we present the design and mapping of a low-cost logic-level aging sensor for FPGA

自恋

Methoden des Knowledge Engineeringains. Existing software-based CEP systems, however, suffer from poor event processing performance because such real-time application domains require high performance. Recent promising approaches would seem to be use of FPGAs in order to accelerate event processing performance. This chapter presents

GILD

eved by dynamically transferring partial configuration bitstreams from off-chip memory to FPGA configuration memory via a specialized datapath. The performance of this datapath can have a significant impact on overall system performance and should be considered early in the design cycle. Unfortunate

gout109

,Grundlagen des Bestärkenden Lernens,e, at the same time, the communication among the modules of the system. The switches are the basic building blocks of such networks, and their design critically affects the performance of the whole system. The way data traverse each switch is governed by the operation of the arbiter and the crossbar