| 书目名称 | Electromigration Inside Logic Cells | | 副标题 | Modeling, Analyzing | | 编辑 | Gracieli Posser,Sachin S. Sapatnekar,Ricardo Reis | | 视频video | | | 概述 | Provides a comprehensive overview of signal electromigration analysis and modeling within logic cells, along with mitigation methodologies.Presents an algorithm to optimize the lifetime of circuits by | | 图书封面 |  | | 描述 | .This book describes new and effective methodologies for modeling, analyzing and mitigating cell-internal signal electromigration in nanoCMOS, with significant circuit lifetime improvements and no impact on performance, area and power. The authors are the first to analyze and propose a solution for the electromigration effects inside logic cells of a circuit. They show in this book that an interconnect inside a cell can fail reducing considerably the circuit lifetime and they demonstrate a methodology to optimize the lifetime of circuits, by placing the output, Vdd and Vss pin of the cells in the less critical regions, where the electromigration effects are reduced. Readers will be enabled to apply this methodology only for the critical cells in the circuit, avoiding impact in the circuit delay, area and performance, thus increasing the lifetime of the circuit without loss in other characteristics. . | | 出版日期 | Book 2017 | | 关键词 | Circuit reliability; Electromigration Techniques; Electromigration Modeling; cell-internal signal elect | | 版次 | 1 | | doi | https://doi.org/10.1007/978-3-319-48899-8 | | isbn_softcover | 978-3-319-84041-3 | | isbn_ebook | 978-3-319-48899-8 | | copyright | Springer International Publishing AG 2017 |
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发表于 2025-3-21 16:27:20
