Titlebook: Architecture of Computing Systems – ARCS 2018; 31st International C Mladen Berekovic,Rainer Buchty,Thilo Pionteck Conference proceedings 20

固执点好

CaCAO: Complex and Compositional Atomic Operations for NoC-Based Manycore Platformsadvantages (no retries and lock-free) of both variants by using dedicated hardware support for inter-tile atomic operations. For frequently used and highly concurrent data structures, we show a speedup factor of 23.9 and 35.4 over the lock-based and lock-free implementations respectively, which increases with higher concurrency.

爱花花儿愤怒

0302-9743 weig, Germany, in April 2018..The 23 full papers presented in this volume were carefully reviewed and selected from 53 submissions. ARCS has always been a conference attracting leading-edge research outcomes in Computer Architecture and Operating Systems, including a wide spectrum of topics ranging

起波澜

Jeffrey A. Joines,Michael G. Kay hardware, usually as a state machine or a combination of communicating state machines, these functionalities may also be implemented by a small processor. In this paper, we present Lipsi, a very tiny processor to make it possible to implement classic finite state machine logic in software at a minimal cost.

Contort

Richard Colmorn,Michael Hülsmann new profiling techniques based on the automatic classification of program allocation sites, with the goal of using those classifications to guide memory tier assignments. We evaluate our approach with different profiling inputs and application strategies, and show that it outperforms other state-of-the-art management techniques.

尊敬

Asparagus

On Automated Feedback-Driven Data Placement in Multi-tiered Memory new profiling techniques based on the automatic classification of program allocation sites, with the goal of using those classifications to guide memory tier assignments. We evaluate our approach with different profiling inputs and application strategies, and show that it outperforms other state-of-the-art management techniques.

CRUDE

逗它小傻瓜

faddish

Closed Loop Controller for Multicore Real-Time Systemstional software functionality on the multicore is required. The previously presented Fingerprinting approach to measure an application’s performance is used as sensor element, extended by a Pulse Width Modulated core thwarting technique and two different control algorithms are combined to a Closed Control Loop.

思想流动

Redundant Execution on Heterogeneous Multi-cores Utilizing Transactional Memorynism is leveraged to recover from errors. The resulting system runs up to 2.9 times faster than a lockstep system consisting of two in-order cores and consumes up to 35% less energy at the same performance than a lockstep system consisting of two out-of-order cores.