fallacy
发表于 2025-3-21 17:30:03
书目名称Ultra-Low-Voltage Design of Energy-Efficient Digital Circuits影响因子(影响力)<br> http://impactfactor.cn/2024/if/?ISSN=BK0940419<br><br> <br><br>书目名称Ultra-Low-Voltage Design of Energy-Efficient Digital Circuits影响因子(影响力)学科排名<br> http://impactfactor.cn/2024/ifr/?ISSN=BK0940419<br><br> <br><br>书目名称Ultra-Low-Voltage Design of Energy-Efficient Digital Circuits网络公开度<br> http://impactfactor.cn/2024/at/?ISSN=BK0940419<br><br> <br><br>书目名称Ultra-Low-Voltage Design of Energy-Efficient Digital Circuits网络公开度学科排名<br> http://impactfactor.cn/2024/atr/?ISSN=BK0940419<br><br> <br><br>书目名称Ultra-Low-Voltage Design of Energy-Efficient Digital Circuits被引频次<br> http://impactfactor.cn/2024/tc/?ISSN=BK0940419<br><br> <br><br>书目名称Ultra-Low-Voltage Design of Energy-Efficient Digital Circuits被引频次学科排名<br> http://impactfactor.cn/2024/tcr/?ISSN=BK0940419<br><br> <br><br>书目名称Ultra-Low-Voltage Design of Energy-Efficient Digital Circuits年度引用<br> http://impactfactor.cn/2024/ii/?ISSN=BK0940419<br><br> <br><br>书目名称Ultra-Low-Voltage Design of Energy-Efficient Digital Circuits年度引用学科排名<br> http://impactfactor.cn/2024/iir/?ISSN=BK0940419<br><br> <br><br>书目名称Ultra-Low-Voltage Design of Energy-Efficient Digital Circuits读者反馈<br> http://impactfactor.cn/2024/5y/?ISSN=BK0940419<br><br> <br><br>书目名称Ultra-Low-Voltage Design of Energy-Efficient Digital Circuits读者反馈学科排名<br> http://impactfactor.cn/2024/5yr/?ISSN=BK0940419<br><br> <br><br>
江湖郎中
发表于 2025-3-22 00:08:01
https://doi.org/10.1007/978-3-319-16136-5Energy-Efficient Digital Circuits; High Performance Integrated Circuit Design; Sub-Threshold Operation
Harass
发表于 2025-3-22 04:27:49
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Osteons
发表于 2025-3-22 06:28:11
978-3-319-38608-9Springer International Publishing Switzerland 2015
发芽
发表于 2025-3-22 09:01:55
Ultra-Low-Voltage Design of Energy-Efficient Digital Circuits978-3-319-16136-5Series ISSN 1872-082X Series E-ISSN 2197-1854
figment
发表于 2025-3-22 15:02:20
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champaign
发表于 2025-3-22 18:54:26
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苦恼
发表于 2025-3-22 22:40:27
Gate-Level Building Blocks,only to operate at very low supply voltages in a variation-resilient manner, but also to function at speeds of . × 10 MHz. Such targets are only possible to achieve when attention is paid to both the transistor-level basic circuits and the architectural level. Careful design of logic gates is crucia
dowagers-hump
发表于 2025-3-23 01:36:46
Architectural Design,ovided for efficient and robust ultra-low-voltage functionality. This chapter starts with theoretical considerations on energy consumption, specifically for transistors operating in the weak inversion region and for circuits which are subjected to high variability. Next, the chapter explores archite
overhaul
发表于 2025-3-23 08:26:05
Datapath Blocks,t of datapath blocks. Their target was to be able to operate at ultra-low supply voltages, while achieving high energy-efficiency, a speed of . × 10MHz and a high yield through variation-resilience. This chapter builds further upon the conclusions of the analyses of different gate-level building blo