调整校对 发表于 2025-3-27 00:01:55
http://reply.papertrans.cn/59/5860/585964/585964_31.pngtroponins 发表于 2025-3-27 02:37:42
Restructuring-Based Lifetime Reliability Improvement of Nanoscale Master-Slave Flip-Flops,functionality of flip-flops (FFs), which is one of the most important elements in digital circuits, plays a key role in the reliability of modern circuit designs. In this chapter, a timing reliability improvement technique is proposed for master-slave FFs, taking into account the impacts of process误传 发表于 2025-3-27 08:12:25
Lifetime Reliability Improvement of Pulsed Flip-Flops,ufacturing process variation and aging phenomena, affecting the reliability of these FFs. In this chapter, the timing reliability of pulsed FFs is improved using a transistor-level restructuring technique. In this technique, we modify the pull-down network of pulsed FFs to decrease the stress time (INCUR 发表于 2025-3-27 12:52:49
http://reply.papertrans.cn/59/5860/585964/585964_34.png山顶可休息 发表于 2025-3-27 16:08:06
Joint Timing Yield and Lifetime Reliability Optimization of Integrated Circuits,d yield. In this chapter, we propose a new two-phase gate sizing approach in order to improve the reliability of circuits while considering the joint effects of process variation and transistor aging. In the first stage, the initial delay of the circuit is optimized to improve its timing yield. Thenengagement 发表于 2025-3-27 18:39:03
http://reply.papertrans.cn/59/5860/585964/585964_36.pngKEGEL 发表于 2025-3-28 00:52:02
http://reply.papertrans.cn/59/5860/585964/585964_37.png