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发表于 2025-3-21 21:43:44
Formal Logic Design of Reprogrammable Controllers or as central control parts inside modern reconfigurable microsystems. A discrete model of a dedicated digital system is derived from the control interpreted Petri net behavioral specification and considered as a modular concurrent state machine. After hierarchical and distributed local state encod
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发表于 2025-3-22 03:45:33
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发表于 2025-3-22 07:51:17
WCET Prediction for Embedded Processors Using an ADLented to describe a processor’s architecture is presented, followed by the presentation of a new, static worst-case execution time (WCET) estimation method. The timing analysis starts by compiling a processor’s architecture program, followed by the disassembling of the program fragment. After sectio
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发表于 2025-3-22 12:44:56
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发表于 2025-3-22 13:24:26
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发表于 2025-3-22 18:54:26
Calculating State Spaces of Hierarchical Petri Nets Using BDD described with the help of logic functions. On the other hand, binary decision diagrams (BDD) are efficient data structures for representing logic functions. Because of the exponential growth of the number of states in Petri nets, it is difficult to process the whole state space. Therefore the abst
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发表于 2025-3-22 23:28:41
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发表于 2025-3-23 02:59:28
Optimal State Assignment of Synchronous Parallel Automatar comparison. One of them is exact; i.e., the number of coding variables obtained by this algorithm is minimal. It is based on covering a nonparallelism graph of partial states by complete bipartite subgraphs. Two other algorithms are heuristic. One of the heuristic algorithms uses the same approach
其他
发表于 2025-3-23 06:36:14
Optimal State Assignment of Asynchronous Parallel Automataing minimal number of coding variables and excluding critical races during automaton operation. Requirements imposing on the partial states codes to eliminate the in-fluence of races are formulated. An exact algorithm to find a minimal solution of the problem of race-free state assignment for parall